BriefWe’re a fast-moving DeepTech company focused on bringing to market innovative solutions that solve complex industrial problems in the field of non-intrusive inspection. As the deepest core of our technology, we investigate, develop and produce our own readout ASICs for industrial applications. Starting as one of the spin-off companies of the High Energy Physics Institute (IFAE) of Barcelona, we are now providing non-intrusive detection solutions to our clients as their industrial partner. So, you'll be part of a highly professional engineering team focused on chip design for products development, surrounded by top scientist and enthusiastic entrepreneurs.We are looking for a senior and passionate mixed-signal ASIC design researcher/engineer with project management and SOC IPs and architecture design skills for the development, implementation and characterization of pixelated readout chips for the next generation of X-Ray Line Spectral Cameras in collaboration with our Engineering Team, external Engineering Companies, and Microelectronics Research Groups at Universitat de Barcelona (UB), and Universitat Autònoma de Barcelona (UAB).Responsibilities Design of custom Analog/Mixed-Signal circuits from concept to silicon verification.Periodical project evaluation and management of internal and external Teams focusing on project planning, deliverables and quality assessment of design blocks and integrated parts.Planning and execution of the experimental characterization of the ASICs.Elaboration of periodical technical documentation and reports related to the ASICs and the projects.Skills - EssentialPh.D./Master’s degree in Electrical (Microelectronics) Engineering. Minimum of 8 years of experience in the design, development and test of analog/mixed-signal IC design.Demonstrated experience with SOCs from the ASIC architecture definition, IP designs and characterization, to silicon validation and wafer test.Good knowledge of common instrumentation equipment such as oscilloscope, ADC, DAC, and waveform generators, and Embedded Systems general architectures based on FPGAs.Strong written and verbal communication and problem-solving skillsSkills - BeneficialExperience in ROICs for HEP detectors is a major plusHigh motivation for taking on new challenges and learning new skills and apply them on new projects, teams, and applicationsAutonomy to set and deliver professional priorities and remain adaptable to changeStart Date: from May 2025Location: Cerdanyola del Vallès (Very close to Barcelona)Role Type: Full TimeLanguages: English (required), Spanish